google-labs-jules[bot] bbc816dc77 Reduce base_train batch size and set PYTORCH_HIP_ALLOC_CONF ... To address "HIP out of memory" errors on some AMD ROCm configurations (potentially due to memory fragmentation or limited per-device VRAM), this change: 1. Reduces the default `device_batch_size` from 32 to 16. 2. Explicitly sets `PYTORCH_HIP_ALLOC_CONF=expandable_segments:True` when ROCm is detected, which helps the allocator manage fragmented memory better than the default behavior.		2025-11-23 16:03:02 +00:00
..
base_eval.py	add explicit UTF-8 encoding	2025-11-03 21:27:12 +01:00
base_loss.py	many small tweaks. base, eval, core work now i think	2025-10-16 15:46:18 -07:00
base_train.py	Reduce base_train batch size and set PYTORCH_HIP_ALLOC_CONF	2025-11-23 16:03:02 +00:00
chat_cli.py	upgrading all other files to be able to use cpu/mps as well as cuda. various minor other changes ,e.g. changing max_iterations to num_iterations in sft script for consistency in naming	2025-10-20 10:15:17 -07:00
chat_eval.py	fix typos	2025-11-14 11:20:25 +01:00
chat_rl.py	typo fixes in scripts	2025-10-28 20:17:31 +01:00
chat_sft.py	fix typo	2025-10-29 19:48:34 +01:00
chat_web.py	ensure consistency of quotes within each statement	2025-11-03 21:52:02 +01:00
mid_train.py	Fix tok/sec metrics for base_train and mid_train when gradient accumulation is not 1	2025-10-26 01:43:49 -05:00
tok_eval.py	initial commit	2025-10-13 06:49:24 -07:00
tok_train.py	initial commit	2025-10-13 06:49:24 -07:00