Changes after review
Change-Id: I6ad261b5b00f34cc389789c707e8d91c45683007
This commit is contained in:
Michal Maka
Ben Gras
parent
b05d70e94c
commit
f9bdbf1089
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@ -22,12 +22,12 @@ Restart the system and the driver should work.
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--------------------------------------------------------------------------------
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Driver was tested using various tools, i. e.
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* fetch - downloading file from the Internet and also local server. Every file
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downloaded well, but speed was about 50-200 kB/s.
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downloaded well, but speed was about 50-200 kB/s.
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* ftp - downloading and uploading 20 MB file completed.
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* ping - checking connection between BeagleBone and computer passed using standard
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settings, when we set ping requests interval to 200 ms it also passed. But with
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20 ms and 2 ms driver dropped some packets (20 ms - about 20% loss, 2 ms - 50%
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loss).
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* ping - checking connection between BeagleBone and computer passed using stan -
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dard settings, when we set ping requests interval to 200 ms it also
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passed. But with 20 ms and 2 ms driver dropped some packets (20 ms -
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about 20% loss, 2 ms - 50% loss).
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* udpstat, hostaddr, dhcpd, ifconfig, arp gave proper results.
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Tests passed, so driver meets the requirements of ethernet driver.
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File diff suppressed because it is too large
Load Diff
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@ -9,9 +9,9 @@ service lan8710a
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DEVIO # 21
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;
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ipc
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SYSTEM pm rs log tty ds vm
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inet lwip ;
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irq 41; # IRQ 41 allowed
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irq 42; # IRQ 42 allowed
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uid 0;
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tty inet lwip
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;
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irq 41 # IRQ 41 allowed
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42 # IRQ 42 allowed
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;
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};
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@ -7,11 +7,11 @@
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#if LAN8710A_DEBUG == 1
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#define LAN8710A_DEBUG_PRINT(args) \
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{ \
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do { \
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printf("LAN8710A DEBUG: "); \
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printf args; \
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printf("\n"); \
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}
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} while (0)
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#else
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#define LAN8710A_DEBUG_PRINT(args)
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#endif
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@ -23,7 +23,10 @@
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#define OK 0 /* general OK flag */
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#endif
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#define MAP_FAILED ((void *) -1) /* mmap() failed */
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#define MAP_FAILED ((void *) -1) /* mmap() failed */
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/* Ethernet driver defines */
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#define LAN8710A_NAME_LEN (11)
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/* Ethernet driver states */
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#define LAN8710A_DETECTED (1 << 0)
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@ -34,17 +37,17 @@
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#define LAN8710A_TRANSMIT (1 << 5)
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/* Descriptors flags */
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#define LAN8710A_DESC_FLAG_OWN (1 << 29) /* ownership flag */
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#define LAN8710A_DESC_FLAG_SOP (1 << 31) /* start of packet flag */
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#define LAN8710A_DESC_FLAG_EOP (1 << 30) /* end of packet flag */
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#define LAN8710A_DESC_FLAG_OWN (1 << 29) /* ownership flag */
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#define LAN8710A_DESC_FLAG_SOP (1 << 31) /* start of packet flag */
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#define LAN8710A_DESC_FLAG_EOP (1 << 30) /* end of packet flag */
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/* Number of Tx and Rx interrupts */
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#define LAN8710A_RX_INTR (41)
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#define LAN8710A_TX_INTR (42)
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/* Values to be written after interrupt handle */
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#define END_OF_RX_INT (1)
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#define END_OF_TX_INT (2)
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/* Values to be written after interrupt handle and interrupt masks*/
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#define RX_INT (1)
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#define TX_INT (2)
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/** Numbers of Tx DMA channels */
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#define TX_DMA_CHANNELS (8)
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@ -71,34 +74,33 @@
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#define TX_DESC_TO_PORT1 (1 << 16)
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#define TX_DESC_TO_PORT_EN (1 << 20)
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typedef struct lan8710a_desc
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typedef struct lan8710a_desc_t
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{
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u32_t next_pointer;
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u32_t buffer_pointer;
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u32_t buffer_length_off;
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u32_t pkt_len_flags;
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}
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lan8710a_desc_t;
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} lan8710a_desc_t;
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typedef struct lan8710a
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typedef struct lan8710a_t
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{
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lan8710a_desc_t *rx_desc;
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lan8710a_desc_t *tx_desc;
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phys_bytes rx_desc_phy;
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phys_bytes tx_desc_phy;
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char name[11];
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char name[LAN8710A_NAME_LEN];
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int status;
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int irq_rx_hook; /* Rx interrupt Request Vector Hook. */
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int irq_tx_hook; /* Tx interrupt Request Vector Hook. */
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int irq_rx_hook; /* Rx interrupt Request Vector Hook. */
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int irq_tx_hook; /* Tx interrupt Request Vector Hook. */
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int instance;
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ether_addr_t address; /* Ethernet MAC address. */
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ether_addr_t address; /* Ethernet MAC address. */
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u8_t *regs;
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u32_t phy_address;
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u8_t *p_rx_buf; /* pointer to the buffer with receive frames */
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u8_t *p_tx_buf; /* pointer to the buffer with transmit frames */
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u8_t *p_rx_buf; /* pointer to the buffer with receive frames */
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u8_t *p_tx_buf; /* pointer to the buffer with transmit frames */
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u16_t tx_desc_idx; /* index of the next transmit desciptor */
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u16_t rx_desc_idx; /* index of the next receive desciptor */
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u16_t tx_desc_idx; /* index of the next transmit desciptor */
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u16_t rx_desc_idx; /* index of the next receive desciptor */
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int client;
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message tx_message;
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message rx_message;
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@ -115,7 +117,7 @@ typedef struct lan8710a
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vir_bytes regs_cpsw_ale;
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vir_bytes regs_cpsw_wr;
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vir_bytes regs_intc;
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vir_bytes regs_cpdma_stateram;
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vir_bytes regs_cpdma_stram;
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} lan8710a_t;
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#endif /* LAN8710A_H_ */
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@ -2,7 +2,7 @@
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#define LAN8710A_REG_H_
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/* How much memory we should map */
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#define MEMORY_LIMIT (0x5302000)
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#define MEMORY_LIMIT (0x5302000)
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#define BEGINNING_DESC_MEM (0x4A102000)
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#define DESC_MEMORY_LIMIT (0x2000)
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#define BEGINNING_RX_DESC_MEM (0x4A102000)
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@ -10,20 +10,20 @@
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/* MDIO Registers */
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#define MDIO_BASE_ADDR (0x4A101000)
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#define MDIOVER ((volatile u32_t *)( lan8710a_state.regs_mdio + 0x00))
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#define MDIOCONTROL ((volatile u32_t *)( lan8710a_state.regs_mdio + 0x04))
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#define MDIOALIVE ((volatile u32_t *)( lan8710a_state.regs_mdio + 0x08))
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#define MDIOLINK ((volatile u32_t *)( lan8710a_state.regs_mdio + 0x0C))
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#define MDIOLINKINTRAW ((volatile u32_t *)( lan8710a_state.regs_mdio + 0x10))
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#define MDIOLINKINTMASKED ((volatile u32_t *)( lan8710a_state.regs_mdio + 0x14))
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#define MDIOUSERINTRAW ((volatile u32_t *)( lan8710a_state.regs_mdio + 0x20))
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#define MDIOUSERINTMASKED ((volatile u32_t *)( lan8710a_state.regs_mdio + 0x24))
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#define MDIOUSERINTMASKSET ((volatile u32_t *)( lan8710a_state.regs_mdio + 0x28))
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#define MDIOUSERINTMASKCLR ((volatile u32_t *)( lan8710a_state.regs_mdio + 0x2C))
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#define MDIOUSERACCESS0 ((volatile u32_t *)( lan8710a_state.regs_mdio + 0x80))
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#define MDIOUSERPHYSEL0 ((volatile u32_t *)( lan8710a_state.regs_mdio + 0x84))
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#define MDIOUSERACCESS1 ((volatile u32_t *)( lan8710a_state.regs_mdio + 0x88))
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#define MDIOUSERPHYSEL1 ((volatile u32_t *)( lan8710a_state.regs_mdio + 0x8C))
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#define MDIOVER ((volatile u32_t *)( lan8710a_state.regs_mdio + 0x00))
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#define MDIOCONTROL ((volatile u32_t *)( lan8710a_state.regs_mdio + 0x04))
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#define MDIOALIVE ((volatile u32_t *)( lan8710a_state.regs_mdio + 0x08))
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#define MDIOLINK ((volatile u32_t *)( lan8710a_state.regs_mdio + 0x0C))
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#define MDIOLINKINTRAW ((volatile u32_t *)( lan8710a_state.regs_mdio + 0x10))
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#define MDIOLINKINTMASKED ((volatile u32_t *)( lan8710a_state.regs_mdio + 0x14))
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#define MDIOUSERINTRAW ((volatile u32_t *)( lan8710a_state.regs_mdio + 0x20))
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#define MDIOUSERINTMASKED ((volatile u32_t *)( lan8710a_state.regs_mdio + 0x24))
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#define MDIOUSERINTMASKSET ((volatile u32_t *)( lan8710a_state.regs_mdio + 0x28))
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#define MDIOUSERINTMASKCLR ((volatile u32_t *)( lan8710a_state.regs_mdio + 0x2C))
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#define MDIOUSERACCESS0 ((volatile u32_t *)( lan8710a_state.regs_mdio + 0x80))
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#define MDIOUSERPHYSEL0 ((volatile u32_t *)( lan8710a_state.regs_mdio + 0x84))
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#define MDIOUSERACCESS1 ((volatile u32_t *)( lan8710a_state.regs_mdio + 0x88))
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#define MDIOUSERPHYSEL1 ((volatile u32_t *)( lan8710a_state.regs_mdio + 0x8C))
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#define MDIO_PREAMBLE (1 << 20)
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#define MDCLK_DIVIDER (0x255)
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@ -90,8 +90,8 @@
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/* CPSW_SL Registers */
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#define CPSW_SL_BASE_ADR (0x4A100D80)
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#define CPSW_SL_MACCONTROL(x) ((volatile u32_t *)( lan8710a_state.regs_cpsw_sl + ((x)-1)*64 + 0x04))
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#define CPSW_SL_SOFT_RESET(x) ((volatile u32_t *)( lan8710a_state.regs_cpsw_sl + ((x)-1)*64 + 0x0C))
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#define CPSW_SL_MACCONTROL(x) ((volatile u32_t *)( lan8710a_state.regs_cpsw_sl + ((x)-1)*64 + 0x04))
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#define CPSW_SL_SOFT_RESET(x) ((volatile u32_t *)( lan8710a_state.regs_cpsw_sl + ((x)-1)*64 + 0x0C))
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#define CPSW_SL_RX_MAXLEN(x) ((volatile u32_t *)( lan8710a_state.regs_cpsw_sl + ((x)-1)*64 + 0x10))
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#define CPSW_SL_BOFFTEST(x) ((volatile u32_t *)( lan8710a_state.regs_cpsw_sl + ((x)-1)*64 + 0x14))
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#define CPSW_SL_EMCONTROL(x) ((volatile u32_t *)( lan8710a_state.regs_cpsw_sl + ((x)-1)*64 + 0x20))
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@ -104,16 +104,16 @@
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/* CPSW_STATS Registers */
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#define CPSW_STATS_BASE_ADR (0x4A100900)
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#define CPSW_STATS_MEM_LIMIT (0x90)
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#define CPSW_STATS_MEM_LIMIT (0x90)
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#define CPSW_STAT_RX_GOOD ((volatile u32_t *)( lan8710a_state.regs_cpsw_stats + 0x00))
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#define CPSW_STAT_RX_CRC_ERR ((volatile u32_t *)( lan8710a_state.regs_cpsw_stats + 0x10))
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#define CPSW_STAT_RX_AGNCD_ERR ((volatile u32_t *)( lan8710a_state.regs_cpsw_stats + 0x14))
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#define CPSW_STAT_RX_OVERSIZE ((volatile u32_t *)( lan8710a_state.regs_cpsw_stats + 0x18))
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#define CPSW_STAT_RX_CRC_ERR ((volatile u32_t *)( lan8710a_state.regs_cpsw_stats + 0x10))
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#define CPSW_STAT_RX_AGNCD_ERR ((volatile u32_t *)( lan8710a_state.regs_cpsw_stats + 0x14))
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#define CPSW_STAT_RX_OVERSIZE ((volatile u32_t *)( lan8710a_state.regs_cpsw_stats + 0x18))
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#define CPSW_STAT_TX_GOOD ((volatile u32_t *)( lan8710a_state.regs_cpsw_stats + 0x34))
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#define CPSW_STAT_COLLISIONS ((volatile u32_t *)( lan8710a_state.regs_cpsw_stats + 0x48))
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#define CPSW_STAT_TX_UNDERRUN ((volatile u32_t *)( lan8710a_state.regs_cpsw_stats + 0x5C))
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#define CPSW_STAT_COLLISIONS ((volatile u32_t *)( lan8710a_state.regs_cpsw_stats + 0x48))
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#define CPSW_STAT_TX_UNDERRUN ((volatile u32_t *)( lan8710a_state.regs_cpsw_stats + 0x5C))
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#define CPSW_STAT_CARR_SENS_ERR ((volatile u32_t *)( lan8710a_state.regs_cpsw_stats + 0x60))
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#define CPSW_STAT_RX_OVERRUN ((volatile u32_t *)( lan8710a_state.regs_cpsw_stats + 0x8C))
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#define CPSW_STAT_RX_OVERRUN ((volatile u32_t *)( lan8710a_state.regs_cpsw_stats + 0x8C))
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/* CPSW_CPDMA Registers */
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#define CPSW_CPDMA_BASE_ADR (0x4A100800)
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@ -122,17 +122,17 @@
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#define CPDMA_RX_CONTROL ((volatile u32_t *)( lan8710a_state.regs_cpsw_cpdma + 0x14))
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#define CPDMA_CONTROL ((volatile u32_t *)( lan8710a_state.regs_cpsw_cpdma + 0x20))
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#define CPDMA_STATUS ((volatile u32_t *)( lan8710a_state.regs_cpsw_cpdma + 0x24))
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#define CPDMA_RX_BUFFER_OFFSET ((volatile u32_t *)( lan8710a_state.regs_cpsw_cpdma + 0x28))
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#define CPDMA_RX_BUFFER_OFFSET ((volatile u32_t *)( lan8710a_state.regs_cpsw_cpdma + 0x28))
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#define CPDMA_EMCONTROL ((volatile u32_t *)( lan8710a_state.regs_cpsw_cpdma + 0x2C))
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#define CPDMA_TX_INTMASK_SET ((volatile u32_t *)( lan8710a_state.regs_cpsw_cpdma + 0x88))
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#define CPDMA_TX_INTMASK_CLEAR ((volatile u32_t *)( lan8710a_state.regs_cpsw_cpdma + 0x8C))
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#define CPDMA_TX_INTMASK_SET ((volatile u32_t *)( lan8710a_state.regs_cpsw_cpdma + 0x88))
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#define CPDMA_TX_INTMASK_CLEAR ((volatile u32_t *)( lan8710a_state.regs_cpsw_cpdma + 0x8C))
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#define CPDMA_EOI_VECTOR ((volatile u32_t *)( lan8710a_state.regs_cpsw_cpdma + 0x94))
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#define CPDMA_RX_INTMASK_SET ((volatile u32_t *)( lan8710a_state.regs_cpsw_cpdma + 0xA8))
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#define CPDMA_RX_INTMASK_CLEAR ((volatile u32_t *)( lan8710a_state.regs_cpsw_cpdma + 0xAC))
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#define CPDMA_RX_INTMASK_SET ((volatile u32_t *)( lan8710a_state.regs_cpsw_cpdma + 0xA8))
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#define CPDMA_RX_INTMASK_CLEAR ((volatile u32_t *)( lan8710a_state.regs_cpsw_cpdma + 0xAC))
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#define CPDMA_IDLE (1 << 31)
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#define CPDMA_TX_RLIM (0xFF << 8)
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#define CPDMA_NO_OFFSET (oxFFFF << 0)
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#define CPDMA_NO_OFFSET (0xFFFF << 0)
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#define CPDMA_RX_CEF (1 << 4)
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#define CPDMA_CMD_IDLE (1 << 3)
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#define RX_OFFLEN_BLOCK (1 << 2)
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#define TX_PTYPE (1 << 0)
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#define CPDMA_TX_EN (1 << 0)
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#define CPDMA_RX_EN (1 << 0)
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#define CPDMA_FIRST_CHAN_INT (1 << 0)
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#define CPDMA_FIRST_CHAN_INT (1 << 0)
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#define CPDMA_ALL_CHAN_INT (0xFF << 0)
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#define CPDMA_TX_PTYPE (1 << 0)
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#define CPDMA_ERROR (0x00F7F700)
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@ -148,8 +148,8 @@
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/* CPSW_SS Registers */
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#define CPSW_SS_BASE_ADR (0x4A100000)
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#define CPSW_SS_SOFT_RESET ((volatile u32_t *)( lan8710a_state.regs_cpsw_ss + 0x08))
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#define CPSW_SS_STAT_PORT_EN ((volatile u32_t *)( lan8710a_state.regs_cpsw_ss + 0x0C))
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#define CPSW_SS_TX_START_WDS ((volatile u32_t *)( lan8710a_state.regs_cpsw_ss + 0x20))
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#define CPSW_SS_STAT_PORT_EN ((volatile u32_t *)( lan8710a_state.regs_cpsw_ss + 0x0C))
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#define CPSW_SS_TX_START_WDS ((volatile u32_t *)( lan8710a_state.regs_cpsw_ss + 0x20))
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#define CPSW_P2_STAT_EN (1 << 2)
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#define CPSW_P1_STAT_EN (1 << 1)
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@ -165,15 +165,15 @@
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#define CPSW_WR_C0_TX_EN ((volatile u32_t *)( lan8710a_state.regs_cpsw_wr + 0x18))
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#define CPSW_WR_C0_TX_STAT ((volatile u32_t *)( lan8710a_state.regs_cpsw_wr + 0x48))
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#define CPSW_FIRST_CHAN_INT (1 << 0)
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#define CPSW_FIRST_CHAN_INT (1 << 0)
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#define CPSW_ALL_CHAN_INT (0xFF << 0)
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/* INTERRUPTION CONTROLLER Registers */
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#define INTC_BASE_ADR (0x48200000)
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#define INTC_SYSCONFIG ((volatile u32_t *)( lan8710a_state.regs_intc + 0x10))
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#define INTC_IDLE ((volatile u32_t *)( lan8710a_state.regs_intc + 0x50))
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#define INTC_SYSCONFIG ((volatile u32_t *)( lan8710a_state.regs_intc + 0x10))
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#define INTC_IDLE ((volatile u32_t *)( lan8710a_state.regs_intc + 0x50))
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#define INTC_MIR_CLEAR1 ((volatile u32_t *)( lan8710a_state.regs_intc + 0xA8))
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#define INTC_ILR(x) ((volatile u32_t *)( lan8710a_state.regs_intc + 0x100 + 4*(x)))
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#define INTC_ILR(x) ((volatile u32_t *)( lan8710a_state.regs_intc + 0x100 + 4*(x)))
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#define INTC_AUTOIDLE (1 << 0)
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#define INTC_FUNCIDLE (1 << 0)
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@ -183,21 +183,21 @@
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#define INTC_TX_MASK (1 << 10)
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/* DMA STATERAM Registers */
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#define CPDMA_STATERAM_BASE_ADR (0x4A100A00)
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#define CPDMA_STATERAM_TX_HDP(x) ((volatile u32_t *)( lan8710a_state.regs_cpdma_stateram + 4*(x)))
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#define CPDMA_STATERAM_RX_HDP(x) ((volatile u32_t *)( lan8710a_state.regs_cpdma_stateram + 0x20 + 4*(x)))
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#define CPDMA_STATERAM_TX_CP(x) ((volatile u32_t *)( lan8710a_state.regs_cpdma_stateram + 0x40 + 4*(x)))
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#define CPDMA_STATERAM_RX_CP(x) ((volatile u32_t *)( lan8710a_state.regs_cpdma_stateram + 0x60 + 4*(x)))
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#define CPDMA_STRAM_BASE_ADR (0x4A100A00)
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#define CPDMA_STRAM_TX_HDP(x) ((volatile u32_t *)( lan8710a_state.regs_cpdma_stram + 4*(x)))
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#define CPDMA_STRAM_RX_HDP(x) ((volatile u32_t *)( lan8710a_state.regs_cpdma_stram + 0x20 + 4*(x)))
|
||||
#define CPDMA_STRAM_TX_CP(x) ((volatile u32_t *)( lan8710a_state.regs_cpdma_stram + 0x40 + 4*(x)))
|
||||
#define CPDMA_STRAM_RX_CP(x) ((volatile u32_t *)( lan8710a_state.regs_cpdma_stram + 0x60 + 4*(x)))
|
||||
|
||||
#define ALL_BITS (0xFFFFFFFF)
|
||||
#define ALL_BITS (0xFFFFFFFF)
|
||||
|
||||
/* LAN8710A Registers */
|
||||
#define PHY_REGISTERS (31)
|
||||
#define LAN8710A_CTRL_REG (0)
|
||||
#define LAN8710A_STATUS_REG (1)
|
||||
#define PHY_REGISTERS (31)
|
||||
#define LAN8710A_CTRL_REG (0)
|
||||
#define LAN8710A_STATUS_REG (1)
|
||||
|
||||
#define LAN8710A_SOFT_RESET (1 << 15)
|
||||
#define LAN8710A_AUTO_NEG (1 << 12)
|
||||
#define LAN8710A_AUTO_NEG_COMPL (1 << 5)
|
||||
#define LAN8710A_SOFT_RESET (1 << 15)
|
||||
#define LAN8710A_AUTO_NEG (1 << 12)
|
||||
#define LAN8710A_AUTO_NEG_COMPL (1 << 5)
|
||||
|
||||
#endif /* LAN8710A_REG_H_ */
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user