From c63ffec40f18d52cf0d8ad83b950455be92ba3dd Mon Sep 17 00:00:00 2001 From: Kees Jongenburger Date: Fri, 29 Nov 2013 14:38:49 +0100 Subject: [PATCH] kernel:pending changes dynamic configuration. Change-Id: I0f0ef014e5f341ad5df8c048863c8e5032b80950 --- include/minix/padconf.h | 18 +++++----- kernel/arch/earm/arch_clock.c | 15 ++++---- kernel/arch/earm/do_padconf.c | 4 +-- kernel/arch/earm/memory.c | 32 +++++++++-------- kernel/arch/earm/omap_intr.c | 14 ++++---- kernel/arch/earm/omap_intr.h | 16 ++++----- kernel/arch/earm/omap_padconf.c | 46 ++++++++++++++++++++----- kernel/arch/earm/omap_timer_registers.h | 8 ++--- 8 files changed, 95 insertions(+), 58 deletions(-) diff --git a/include/minix/padconf.h b/include/minix/padconf.h index ba09a1c99..ee5d51995 100644 --- a/include/minix/padconf.h +++ b/include/minix/padconf.h @@ -5,15 +5,15 @@ * The base must be page aligned, so we round down and the kernel adds the * offset. The size must be a multiple of ARM_PAGE_SIZE, so we round up to 4KB. */ -#ifdef AM335X -#define PADCONF_REGISTERS_BASE 0x44E10000 -#define PADCONF_REGISTERS_OFFSET 0x0000 -#define PADCONF_REGISTERS_SIZE 0x1000 /* OFFSET + highest reg, rounded up */ -#elif DM37XX -#define PADCONF_REGISTERS_BASE 0x48002000 -#define PADCONF_REGISTERS_OFFSET 0x0030 -#define PADCONF_REGISTERS_SIZE 0x1000 /* OFFSET + highest reg, rounded up */ -#endif +//#ifdef AM335X +#define PADCONF_AM335X_REGISTERS_BASE 0x44E10000 +#define PADCONF_AM335X_REGISTERS_OFFSET 0x0000 +#define PADCONF_AM335X_REGISTERS_SIZE 0x1000 /* OFFSET + highest reg, rounded up */ +//#elif DM37XX +#define PADCONF_DM37XX_REGISTERS_BASE 0x48002000 +#define PADCONF_DM37XX_REGISTERS_OFFSET 0x0030 +#define PADCONF_DM37XX_REGISTERS_SIZE 0x1000 /* OFFSET + highest reg, rounded up */ +//#endif #define PADCONF_MUXMODE(X) (X & 0x7) /* mode 1 til 7 [2:0] */ #define PADCONF_PULL_MODE(X) ((X & 0x3) << 3) /* 2 bits[4:3] */ diff --git a/kernel/arch/earm/arch_clock.c b/kernel/arch/earm/arch_clock.c index 754c6ccde..b045ca75c 100644 --- a/kernel/arch/earm/arch_clock.c +++ b/kernel/arch/earm/arch_clock.c @@ -7,6 +7,7 @@ #include "kernel/proc.h" #include "kernel/interrupt.h" #include +#include #include "kernel/glo.h" #include "kernel/profile.h" @@ -28,12 +29,14 @@ int init_local_timer(unsigned freq) { omap3_timer_init(freq); omap3_frclock_init(); -#ifdef DM37XX - tsc_per_ms[0] = 16250; -#endif -#ifdef AM335X - tsc_per_ms[0] = 15000; -#endif + + if (BOARD_IS_BBXM(machine.board_id)){ + tsc_per_ms[0] = 16250; + } else if (BOARD_IS_BB(machine.board_id)){ + tsc_per_ms[0] = 15000; + } else { + panic("Can not do the clock setup. machine (0x%08x) is unknown\n",machine.board_id); + }; return 0; } diff --git a/kernel/arch/earm/do_padconf.c b/kernel/arch/earm/do_padconf.c index 544fa49bd..e1087ec5f 100644 --- a/kernel/arch/earm/do_padconf.c +++ b/kernel/arch/earm/do_padconf.c @@ -4,9 +4,9 @@ #if USE_PADCONF /* get arch specific arch_padconf_set() */ -#if defined(AM335X) || defined(DM37XX) +//#if defined(AM335X) || defined(DM37XX) #include "omap_padconf.h" -#endif +//#endif /*===========================================================================* * do_padconf * diff --git a/kernel/arch/earm/memory.c b/kernel/arch/earm/memory.c index 4da9f118b..faa48ce51 100644 --- a/kernel/arch/earm/memory.c +++ b/kernel/arch/earm/memory.c @@ -6,6 +6,7 @@ #include #include +#include #include #include #include @@ -737,12 +738,13 @@ int arch_phys_map(const int index, } else if (index == frclock_index) { -#ifdef DM37XX - *addr = OMAP3_GPTIMER10_BASE; -#endif -#ifdef AM335X - *addr = AM335X_DMTIMER7_BASE; -#endif + if (BOARD_IS_BBXM(machine.board_id)){ + *addr = OMAP3_GPTIMER10_BASE; + } else if (BOARD_IS_BB(machine.board_id)){ + *addr = AM335X_DMTIMER7_BASE; + } else { + panic("Can not do the clock setup. machine (0x%08x) is unknown\n",machine.board_id); + }; *len = ARM_PAGE_SIZE; *flags = VMMF_UNCACHED | VMMF_USER; return OK; @@ -792,15 +794,15 @@ int arch_phys_map_reply(const int index, const vir_bytes addr) return OK; } else if (index == frclock_index) { -#if defined(DM37XX) - minix_kerninfo.minix_frclock_tcrr = addr + OMAP3_TIMER_TCRR; - minix_kerninfo.minix_arm_frclock_hz = 1625000; -#elif defined(AM335X) - minix_kerninfo.minix_frclock_tcrr = addr + AM335X_TIMER_TCRR; - minix_kerninfo.minix_arm_frclock_hz = 1500000; -#else -#error ARM: plese define either AM335X or DM37XX. -#endif + if (BOARD_IS_BBXM(machine.board_id)){ + minix_kerninfo.minix_frclock_tcrr = addr + OMAP3_TIMER_TCRR; + minix_kerninfo.minix_arm_frclock_hz = 1625000; + } else if (BOARD_IS_BB(machine.board_id)){ + minix_kerninfo.minix_frclock_tcrr = addr + AM335X_TIMER_TCRR; + minix_kerninfo.minix_arm_frclock_hz = 1500000; + } else { + panic("memory setup errot machine (0x%08x) is unhandled\n",machine.board_id); + }; return OK; } diff --git a/kernel/arch/earm/omap_intr.c b/kernel/arch/earm/omap_intr.c index a99b8c6a1..7dac821a6 100644 --- a/kernel/arch/earm/omap_intr.c +++ b/kernel/arch/earm/omap_intr.c @@ -1,6 +1,7 @@ #include #include #include +#include #include #include "kernel/kernel.h" @@ -21,12 +22,13 @@ static kern_phys_map intr_phys_map; int intr_init(const int auto_eoi) { -#ifdef DM37XX - omap_intr.base = OMAP3_DM37XX_INTR_BASE; -#endif -#ifdef AM335X - omap_intr.base = OMAP3_AM335X_INTR_BASE; -#endif + if (BOARD_IS_BBXM(machine.board_id)){ + omap_intr.base = OMAP3_DM37XX_INTR_BASE; + } else if (BOARD_IS_BB(machine.board_id)){ + omap_intr.base = OMAP3_AM335X_INTR_BASE; + } else { + panic("Can not do the interrupt setup. machine (0x%08x) is unknown\n",machine.board_id); + }; omap_intr.size = 0x1000 ; /* 4K */ kern_phys_map_ptr(omap_intr.base,omap_intr.size, diff --git a/kernel/arch/earm/omap_intr.h b/kernel/arch/earm/omap_intr.h index 32e7eaca7..60c53aefb 100644 --- a/kernel/arch/earm/omap_intr.h +++ b/kernel/arch/earm/omap_intr.h @@ -1,16 +1,16 @@ #ifndef _OMAP_INTR_H #define _OMAP_INTR_H -#ifdef DM37XX +//#ifdef DM37XX /* Interrupt controller memory map */ #define OMAP3_DM37XX_INTR_BASE 0x48200000 /* INTCPS physical address */ -#endif /* DM37XX */ +//#endif /* DM37XX */ -#ifdef AM335X +//#ifdef AM335X /* Interrupt controller memory map */ #define OMAP3_AM335X_INTR_BASE 0x48200000 /* INTCPS physical address */ -#endif /* AM335X */ +//#endif /* AM335X */ /* Interrupt controller registers */ #define OMAP3_INTCPS_REVISION 0x000 /* IP revision code */ @@ -59,7 +59,7 @@ -#ifdef DM37XX +//#ifdef DM37XX #define OMAP3_DM337X_NR_IRQ_VECTORS 96 @@ -135,9 +135,9 @@ #define OMAP3_HSUSB_DMA_IRQ 93 /* High-speed USB OTG DMA */ #define OMAP3_MMC3_IRQ 94 /* MMC/SD module 3 */ -#endif +//#endif -#ifdef AM335X +//#ifdef AM335X #define AM335X_INT_EMUINT 0 /* Emulation interrupt (EMUICINTR) */ #define AM335X_INT_COMMTX 1 /* CortexA8 COMMTX */ #define AM335X_INT_COMMRX 2 /* CortexA8 COMMRX */ @@ -239,7 +239,7 @@ #define AM335X_INT_SPI1INT 125 /* McSPI1 SINTERRUPTN */ #define OMAP3_AM335X_NR_IRQ_VECTORS 125 -#endif +//#endif #ifndef __ASSEMBLY__ diff --git a/kernel/arch/earm/omap_padconf.c b/kernel/arch/earm/omap_padconf.c index 3b6638a8b..2c8f52246 100644 --- a/kernel/arch/earm/omap_padconf.c +++ b/kernel/arch/earm/omap_padconf.c @@ -6,6 +6,7 @@ #include #include #include +#include #include #include #include @@ -18,25 +19,43 @@ struct omap_padconf vir_bytes base; vir_bytes offset; vir_bytes size; + unsigned int board_filter_value; + unsigned int board_filter_mask; }; -static struct omap_padconf omap_padconf = { - .base = PADCONF_REGISTERS_BASE, - .offset = PADCONF_REGISTERS_OFFSET, - .size = PADCONF_REGISTERS_SIZE + +struct omap_padconf omap_padconfs[] = { + { + .base = PADCONF_DM37XX_REGISTERS_BASE, + .offset = PADCONF_DM37XX_REGISTERS_OFFSET, + .size = PADCONF_DM37XX_REGISTERS_SIZE, + .board_filter_value = BOARD_FILTER_BBXM_VALUE, + .board_filter_mask = BOARD_FILTER_BBXM_MASK, + }, + { + .base = PADCONF_AM335X_REGISTERS_BASE, + .offset = PADCONF_AM335X_REGISTERS_OFFSET, + .size = PADCONF_AM335X_REGISTERS_SIZE, + .board_filter_value = BOARD_FILTER_BB_VALUE, + .board_filter_mask = BOARD_FILTER_BB_MASK, + }, }; +/* initialized in init */ +static struct omap_padconf *omap_padconf; + + static kern_phys_map padconf_phys_map; int arch_padconf_set(u32_t padconf, u32_t mask, u32_t value) { /* check that the value will be inside the padconf memory range */ - if (padconf >= (PADCONF_REGISTERS_SIZE - PADCONF_REGISTERS_OFFSET)) { + if (padconf >= (omap_padconf->size - omap_padconf->offset)) { return EINVAL; /* outside of valid range */ } - set32(padconf + omap_padconf.base + omap_padconf.offset, mask, value); + set32(padconf + omap_padconf->base + omap_padconf->offset, mask, value); return OK; } @@ -44,8 +63,19 @@ arch_padconf_set(u32_t padconf, u32_t mask, u32_t value) void arch_padconf_init(void) { - kern_phys_map_ptr(omap_padconf.base, omap_padconf.size, - &padconf_phys_map, (vir_bytes) &omap_padconf.base); + int x; + omap_padconf = NULL; + /* find the correct padconf */ + for (x =0 ; x < sizeof(omap_padconfs)/sizeof(omap_padconfs[0]) ; x++){ + if ( (omap_padconfs[x].board_filter_mask & machine.board_id) == omap_padconfs[x].board_filter_value){ + omap_padconf = &omap_padconfs[x]; + break; + } + } + assert(omap_padconf); + + kern_phys_map_ptr(omap_padconf->base, omap_padconf->size, + &padconf_phys_map, (vir_bytes) &omap_padconf->base); return; } diff --git a/kernel/arch/earm/omap_timer_registers.h b/kernel/arch/earm/omap_timer_registers.h index 42e55b190..b49206aec 100644 --- a/kernel/arch/earm/omap_timer_registers.h +++ b/kernel/arch/earm/omap_timer_registers.h @@ -1,7 +1,7 @@ #ifndef _OMAP_TIMER_REGISTERS_H #define _OMAP_TIMER_REGISTERS_H -#ifdef DM37XX +//#ifdef DM37XX /* General-purpose timer register map */ #define OMAP3_GPTIMER1_BASE 0x48318000 /* GPTIMER1 physical address */ @@ -16,7 +16,7 @@ #define OMAP3_GPTIMER10_BASE 0x48086000 /* GPTIMER10 physical address */ #define OMAP3_GPTIMER11_BASE 0x48088000 /* GPTIMER11 physical address */ -#endif /* DM37XX */ +//#endif /* DM37XX */ /* General-purpose timer registers */ #define OMAP3_TIMER_TIDR 0x000 /* IP revision code */ @@ -40,7 +40,7 @@ #define OMAP3_TIMER_TOCR 0x054 /* Masks tick interrupt */ #define OMAP3_TIMER_TOWR 0x058 /* Number of masked overflow interrupts */ -#ifdef AM335X +//#ifdef AM335X #define AM335X_DMTIMER0_BASE 0x44E05000 /* DMTimer0 Registers */ #define AM335X_DMTIMER1_1MS_BASE 0x44E31000 /* DMTimer1 1ms Registers (Accurate 1ms timer) */ #define AM335X_DMTIMER2_BASE 0x48040000 /* DMTimer2 Registers */ @@ -68,7 +68,7 @@ #define AM335X_TIMER_TSICR 0x054 /* Control posted mode and functional SW reset */ #define AM335X_TIMER_TCAR2 0x058 /* Second captured value of counter register */ -#endif +//#endif /* Interrupt status register fields */