Merge branch 'master' of https://github.com/Stichting-MINIX-Research-Foundation/minix into Stichting-MINIX-Research-Foundation-master
This commit is contained in:
commit
bd3e377791
|
|
@ -15,6 +15,7 @@
|
||||||
./etc/system.conf.d/es1371 minix-base
|
./etc/system.conf.d/es1371 minix-base
|
||||||
./etc/system.conf.d/e1000 minix-base
|
./etc/system.conf.d/e1000 minix-base
|
||||||
./etc/system.conf.d/fxp minix-base
|
./etc/system.conf.d/fxp minix-base
|
||||||
|
./etc/system.conf.d/ip1000 minix-base
|
||||||
./etc/system.conf.d/lance minix-base
|
./etc/system.conf.d/lance minix-base
|
||||||
./etc/system.conf.d/printer minix-base
|
./etc/system.conf.d/printer minix-base
|
||||||
./etc/system.conf.d/rtl8139 minix-base
|
./etc/system.conf.d/rtl8139 minix-base
|
||||||
|
|
@ -41,6 +42,7 @@
|
||||||
./service/floppy minix-base
|
./service/floppy minix-base
|
||||||
./service/fxp minix-base
|
./service/fxp minix-base
|
||||||
./service/hgfs minix-base
|
./service/hgfs minix-base
|
||||||
|
./service/ip1000 minix-base
|
||||||
./service/lance minix-base
|
./service/lance minix-base
|
||||||
./service/pci minix-base
|
./service/pci minix-base
|
||||||
./service/pckbd minix-base
|
./service/pckbd minix-base
|
||||||
|
|
|
||||||
|
|
@ -27,6 +27,7 @@
|
||||||
./usr/libdata/debug/service/floppy.debug minix-debug debug
|
./usr/libdata/debug/service/floppy.debug minix-debug debug
|
||||||
./usr/libdata/debug/service/fxp.debug minix-debug debug
|
./usr/libdata/debug/service/fxp.debug minix-debug debug
|
||||||
./usr/libdata/debug/service/hgfs.debug minix-debug debug
|
./usr/libdata/debug/service/hgfs.debug minix-debug debug
|
||||||
|
./usr/libdata/debug/service/ip1000.debug minix-debug debug
|
||||||
./usr/libdata/debug/service/lance.debug minix-debug debug
|
./usr/libdata/debug/service/lance.debug minix-debug debug
|
||||||
./usr/libdata/debug/service/pci.debug minix-debug debug
|
./usr/libdata/debug/service/pci.debug minix-debug debug
|
||||||
./usr/libdata/debug/service/pckbd.debug minix-debug debug
|
./usr/libdata/debug/service/pckbd.debug minix-debug debug
|
||||||
|
|
|
||||||
1
external/bsd/pkg_install/Makefile.inc
vendored
1
external/bsd/pkg_install/Makefile.inc
vendored
|
|
@ -12,6 +12,7 @@ CPPFLAGS+=-DSYSCONFDIR='"/etc"'
|
||||||
.else
|
.else
|
||||||
CPPFLAGS+=-DSYSCONFDIR='"/usr/pkg/etc"'
|
CPPFLAGS+=-DSYSCONFDIR='"/usr/pkg/etc"'
|
||||||
CPPFLAGS+=-DDEF_LOG_DIR='"/usr/pkg/var/db/pkg"'
|
CPPFLAGS+=-DDEF_LOG_DIR='"/usr/pkg/var/db/pkg"'
|
||||||
|
CPPFLAGS+=-DOPSYS_NAME='"Minix"'
|
||||||
.endif # !defined(__MINIX)
|
.endif # !defined(__MINIX)
|
||||||
|
|
||||||
WARNS= 4
|
WARNS= 4
|
||||||
|
|
|
||||||
|
|
@ -4,6 +4,16 @@
|
||||||
|
|
||||||
.if defined(__MINIX)
|
.if defined(__MINIX)
|
||||||
SUBDIR+= texinfo
|
SUBDIR+= texinfo
|
||||||
|
|
||||||
|
.if ${USETOOLS} != "yes"
|
||||||
|
# MINIX: make sure sources are fetched, even when tools were not built earlier
|
||||||
|
MODULE= texinfo
|
||||||
|
GNUHOSTDIST= ${NETBSDSRCDIR}/gnu/dist/${MODULE}
|
||||||
|
.include "${.CURDIR}/../../minix/Makefile.fetchgnu"
|
||||||
|
|
||||||
|
realall realdepend: ${GNUHOSTDIST:H}/.gitignore
|
||||||
|
.endif # defined(__MINIX)
|
||||||
|
|
||||||
.else
|
.else
|
||||||
SUBDIR+= bc
|
SUBDIR+= bc
|
||||||
SUBDIR+= c89 c99
|
SUBDIR+= c89 c99
|
||||||
|
|
|
||||||
|
|
@ -8,6 +8,7 @@ SUBDIR+= dp8390
|
||||||
SUBDIR+= dpeth
|
SUBDIR+= dpeth
|
||||||
SUBDIR+= e1000
|
SUBDIR+= e1000
|
||||||
SUBDIR+= fxp
|
SUBDIR+= fxp
|
||||||
|
SUBDIR+= ip1000
|
||||||
SUBDIR+= lance
|
SUBDIR+= lance
|
||||||
SUBDIR+= rtl8139
|
SUBDIR+= rtl8139
|
||||||
SUBDIR+= rtl8169
|
SUBDIR+= rtl8169
|
||||||
|
|
|
||||||
|
|
@ -70,6 +70,7 @@ static u16_t read_phy_reg(u32_t base, int phy_addr, int phy_reg) {
|
||||||
u32_t field[8];
|
u32_t field[8];
|
||||||
u8_t data, polar;
|
u8_t data, polar;
|
||||||
|
|
||||||
|
<<<<<<< HEAD
|
||||||
field[0] = 0xffffffff; fieldlen[0] = 32;
|
field[0] = 0xffffffff; fieldlen[0] = 32;
|
||||||
field[1] = 0x0001; fieldlen[1] = 2;
|
field[1] = 0x0001; fieldlen[1] = 2;
|
||||||
field[2] = 0x0002; fieldlen[2] = 2;
|
field[2] = 0x0002; fieldlen[2] = 2;
|
||||||
|
|
@ -77,6 +78,15 @@ static u16_t read_phy_reg(u32_t base, int phy_addr, int phy_reg) {
|
||||||
field[4] = phy_reg; fieldlen[4] = 5;
|
field[4] = phy_reg; fieldlen[4] = 5;
|
||||||
field[5] = 0x0000; fieldlen[5] = 2;
|
field[5] = 0x0000; fieldlen[5] = 2;
|
||||||
field[6] = 0x0000; fieldlen[6] = 16;
|
field[6] = 0x0000; fieldlen[6] = 16;
|
||||||
|
=======
|
||||||
|
field[0] = 0xffffffff; fieldlen[0] = 32;
|
||||||
|
field[1] = 0x0001; fieldlen[1] = 2;
|
||||||
|
field[2] = 0x0002; fieldlen[2] = 2;
|
||||||
|
field[3] = phy_addr; fieldlen[3] = 5;
|
||||||
|
field[4] = phy_reg; fieldlen[4] = 5;
|
||||||
|
field[5] = 0x0000; fieldlen[5] = 2;
|
||||||
|
field[6] = 0x0000; fieldlen[6] = 16;
|
||||||
|
>>>>>>> 3f862305f83a4a0421b5952d0686bebd9aeee0bc
|
||||||
field[7] = 0x0000; fieldlen[7] = 1;
|
field[7] = 0x0000; fieldlen[7] = 1;
|
||||||
|
|
||||||
polar = ic_in8(base, REG_PHY_CTRL) & 0x28;
|
polar = ic_in8(base, REG_PHY_CTRL) & 0x28;
|
||||||
|
|
@ -123,6 +133,7 @@ static void write_phy_reg(u32_t base, int phy_addr, int phy_reg, u16_t val) {
|
||||||
u32_t field[8];
|
u32_t field[8];
|
||||||
u8_t data, polar;
|
u8_t data, polar;
|
||||||
|
|
||||||
|
<<<<<<< HEAD
|
||||||
field[0] = 0xffffffff; fieldlen[0] = 32;
|
field[0] = 0xffffffff; fieldlen[0] = 32;
|
||||||
field[1] = 0x0001; fieldlen[1] = 2;
|
field[1] = 0x0001; fieldlen[1] = 2;
|
||||||
field[2] = 0x0001; fieldlen[2] = 2;
|
field[2] = 0x0001; fieldlen[2] = 2;
|
||||||
|
|
@ -130,6 +141,15 @@ static void write_phy_reg(u32_t base, int phy_addr, int phy_reg, u16_t val) {
|
||||||
field[4] = phy_reg; fieldlen[4] = 5;
|
field[4] = phy_reg; fieldlen[4] = 5;
|
||||||
field[5] = 0x0002; fieldlen[5] = 2;
|
field[5] = 0x0002; fieldlen[5] = 2;
|
||||||
field[6] = val; fieldlen[6] = 16;
|
field[6] = val; fieldlen[6] = 16;
|
||||||
|
=======
|
||||||
|
field[0] = 0xffffffff; fieldlen[0] = 32;
|
||||||
|
field[1] = 0x0001; fieldlen[1] = 2;
|
||||||
|
field[2] = 0x0001; fieldlen[2] = 2;
|
||||||
|
field[3] = phy_addr; fieldlen[3] = 5;
|
||||||
|
field[4] = phy_reg; fieldlen[4] = 5;
|
||||||
|
field[5] = 0x0002; fieldlen[5] = 2;
|
||||||
|
field[6] = val; fieldlen[6] = 16;
|
||||||
|
>>>>>>> 3f862305f83a4a0421b5952d0686bebd9aeee0bc
|
||||||
field[7] = 0x0000; fieldlen[7] = 1;
|
field[7] = 0x0000; fieldlen[7] = 1;
|
||||||
|
|
||||||
polar = ic_in8(base, REG_PHY_CTRL) & 0x28;
|
polar = ic_in8(base, REG_PHY_CTRL) & 0x28;
|
||||||
|
|
@ -146,7 +166,11 @@ static void write_phy_reg(u32_t base, int phy_addr, int phy_reg, u16_t val) {
|
||||||
for (i = 0; i < fieldlen[7]; i ++) {
|
for (i = 0; i < fieldlen[7]; i ++) {
|
||||||
ic_out8(base, REG_PHY_CTRL, polar);
|
ic_out8(base, REG_PHY_CTRL, polar);
|
||||||
micro_delay(10);
|
micro_delay(10);
|
||||||
|
<<<<<<< HEAD
|
||||||
field[7] |= ((ic_in8(base, REG_PHY_CTRL) & 0x02) >> 1)
|
field[7] |= ((ic_in8(base, REG_PHY_CTRL) & 0x02) >> 1)
|
||||||
|
=======
|
||||||
|
field[7] |= ((ic_in8(base, REG_PHY_CTRL) & 0x02) >> 1)
|
||||||
|
>>>>>>> 3f862305f83a4a0421b5952d0686bebd9aeee0bc
|
||||||
<< (fieldlen[7] - i -1);
|
<< (fieldlen[7] - i -1);
|
||||||
ic_out8(base, REG_PHY_CTRL, (data | 0x01));
|
ic_out8(base, REG_PHY_CTRL, (data | 0x01));
|
||||||
micro_delay(10);
|
micro_delay(10);
|
||||||
|
|
@ -178,7 +202,11 @@ static int ic_real_reset(u32_t base) {
|
||||||
micro_delay(10000);
|
micro_delay(10000);
|
||||||
if (ic_in32(base, REG_ASIC_CTRL) & AC_RESET_BUSY)
|
if (ic_in32(base, REG_ASIC_CTRL) & AC_RESET_BUSY)
|
||||||
return -EIO;
|
return -EIO;
|
||||||
|
<<<<<<< HEAD
|
||||||
return OK;
|
return OK;
|
||||||
|
=======
|
||||||
|
return OK;
|
||||||
|
>>>>>>> 3f862305f83a4a0421b5952d0686bebd9aeee0bc
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Intialize power (### POWER_INIT_CAN_FAIL ###)
|
/* Intialize power (### POWER_INIT_CAN_FAIL ###)
|
||||||
|
|
@ -304,14 +332,22 @@ static void ic_get_addr(u32_t base, u8_t *pa) {
|
||||||
pa[5] = (u8_t)((ic_in16(base, REG_STA_ADDR2) & 0xff00) >> 8);
|
pa[5] = (u8_t)((ic_in16(base, REG_STA_ADDR2) & 0xff00) >> 8);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
<<<<<<< HEAD
|
||||||
/* Check link status (### CHECK_LINK ###)
|
/* Check link status (### CHECK_LINK ###)
|
||||||
|
=======
|
||||||
|
/* Check link status (### CHECK_LINK ###)
|
||||||
|
>>>>>>> 3f862305f83a4a0421b5952d0686bebd9aeee0bc
|
||||||
* -- Return LINK_UP or LINK_DOWN */
|
* -- Return LINK_UP or LINK_DOWN */
|
||||||
static int ic_check_link(u32_t base) {
|
static int ic_check_link(u32_t base) {
|
||||||
u8_t phy_ctrl;
|
u8_t phy_ctrl;
|
||||||
u32_t mac_ctrl;
|
u32_t mac_ctrl;
|
||||||
int ret;
|
int ret;
|
||||||
char speed[20], duplex[20];
|
char speed[20], duplex[20];
|
||||||
|
<<<<<<< HEAD
|
||||||
|
|
||||||
|
=======
|
||||||
|
|
||||||
|
>>>>>>> 3f862305f83a4a0421b5952d0686bebd9aeee0bc
|
||||||
phy_ctrl = ic_in8(base, REG_PHY_CTRL);
|
phy_ctrl = ic_in8(base, REG_PHY_CTRL);
|
||||||
mac_ctrl = ic_in8(base, REG_MAC_CTRL);
|
mac_ctrl = ic_in8(base, REG_MAC_CTRL);
|
||||||
switch (phy_ctrl & PC_LINK_SPEED) {
|
switch (phy_ctrl & PC_LINK_SPEED) {
|
||||||
|
|
@ -350,7 +386,11 @@ static void ic_stop_rx_tx(u32_t base) {
|
||||||
ic_out32(base, REG_ASIC_CTRL, AC_RESET_ALL);
|
ic_out32(base, REG_ASIC_CTRL, AC_RESET_ALL);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
<<<<<<< HEAD
|
||||||
/* Check whether Rx status OK (### CHECK_RX_STATUS_OK ###)
|
/* Check whether Rx status OK (### CHECK_RX_STATUS_OK ###)
|
||||||
|
=======
|
||||||
|
/* Check whether Rx status OK (### CHECK_RX_STATUS_OK ###)
|
||||||
|
>>>>>>> 3f862305f83a4a0421b5952d0686bebd9aeee0bc
|
||||||
* -- Return TRUE or FALSE */
|
* -- Return TRUE or FALSE */
|
||||||
static int ic_rx_status_ok(ic_desc *desc) {
|
static int ic_rx_status_ok(ic_desc *desc) {
|
||||||
if ((desc->status & RFS_NORMAL) == RFS_NORMAL)
|
if ((desc->status & RFS_NORMAL) == RFS_NORMAL)
|
||||||
|
|
@ -358,7 +398,11 @@ static int ic_rx_status_ok(ic_desc *desc) {
|
||||||
return FALSE;
|
return FALSE;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
<<<<<<< HEAD
|
||||||
/* Get Rx data length from descriptor (### GET_RX_LEN ###)
|
/* Get Rx data length from descriptor (### GET_RX_LEN ###)
|
||||||
|
=======
|
||||||
|
/* Get Rx data length from descriptor (### GET_RX_LEN ###)
|
||||||
|
>>>>>>> 3f862305f83a4a0421b5952d0686bebd9aeee0bc
|
||||||
* --- Return the length */
|
* --- Return the length */
|
||||||
static int ic_get_rx_len(ic_desc *desc) {
|
static int ic_get_rx_len(ic_desc *desc) {
|
||||||
int totlen;
|
int totlen;
|
||||||
|
|
@ -370,10 +414,17 @@ static int ic_get_rx_len(ic_desc *desc) {
|
||||||
static void ic_tx_desc_start(ic_desc *desc, size_t size) {
|
static void ic_tx_desc_start(ic_desc *desc, size_t size) {
|
||||||
desc->status = TFS_TFD_DONE;
|
desc->status = TFS_TFD_DONE;
|
||||||
desc->status |= (u64_t)(TFS_WORD_ALIGN | (TFS_FRAMEID & (g_driver.tx_head))
|
desc->status |= (u64_t)(TFS_WORD_ALIGN | (TFS_FRAMEID & (g_driver.tx_head))
|
||||||
|
<<<<<<< HEAD
|
||||||
| (TFS_FRAG_COUNT & (1 << 24)));
|
| (TFS_FRAG_COUNT & (1 << 24)));
|
||||||
desc->status |= TFS_TX_DMA_INDICATE;
|
desc->status |= TFS_TX_DMA_INDICATE;
|
||||||
desc->frag_info |= TFI_FRAG_LEN & ((u64_t)((size >= 60 ? size : 60) &
|
desc->frag_info |= TFI_FRAG_LEN & ((u64_t)((size >= 60 ? size : 60) &
|
||||||
0xffff) << 48);
|
0xffff) << 48);
|
||||||
|
=======
|
||||||
|
| (TFS_FRAG_COUNT & (1 << 24)));
|
||||||
|
desc->status |= TFS_TX_DMA_INDICATE;
|
||||||
|
desc->frag_info |= TFI_FRAG_LEN & ((u64_t)((size >= 60 ? size : 60) &
|
||||||
|
0xffff) << 48);
|
||||||
|
>>>>>>> 3f862305f83a4a0421b5952d0686bebd9aeee0bc
|
||||||
desc->status &= (u64_t)(~(TFS_TFD_DONE));
|
desc->status &= (u64_t)(~(TFS_TFD_DONE));
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
@ -382,7 +433,11 @@ static void ic_wakeup_tx(u32_t base) {
|
||||||
ic_out32(base, REG_DMA_CTRL, 0x00001000);
|
ic_out32(base, REG_DMA_CTRL, 0x00001000);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
<<<<<<< HEAD
|
||||||
/* Check whether Tx status OK (### CHECK_TX_STATUS_OK ###)
|
/* Check whether Tx status OK (### CHECK_TX_STATUS_OK ###)
|
||||||
|
=======
|
||||||
|
/* Check whether Tx status OK (### CHECK_TX_STATUS_OK ###)
|
||||||
|
>>>>>>> 3f862305f83a4a0421b5952d0686bebd9aeee0bc
|
||||||
* -- Return TRUE or FALSE */
|
* -- Return TRUE or FALSE */
|
||||||
static int ic_tx_status_ok(ic_desc *desc) {
|
static int ic_tx_status_ok(ic_desc *desc) {
|
||||||
if (desc->status & TFS_TFD_DONE)
|
if (desc->status & TFS_TFD_DONE)
|
||||||
|
|
@ -500,7 +555,11 @@ static int ic_probe(ic_driver *pdev, int instance) {
|
||||||
}
|
}
|
||||||
pdev->base_addr = bar;
|
pdev->base_addr = bar;
|
||||||
#endif
|
#endif
|
||||||
|
<<<<<<< HEAD
|
||||||
|
|
||||||
|
=======
|
||||||
|
|
||||||
|
>>>>>>> 3f862305f83a4a0421b5952d0686bebd9aeee0bc
|
||||||
/* Get irq number */
|
/* Get irq number */
|
||||||
irq = pci_attr_r8(devind, PCI_ILR);
|
irq = pci_attr_r8(devind, PCI_ILR);
|
||||||
pdev->irq = irq;
|
pdev->irq = irq;
|
||||||
|
|
@ -747,7 +806,11 @@ static void ic_conf_addr(ic_driver *pdev, ether_addr_t *addr) {
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Stop the driver */
|
/* Stop the driver */
|
||||||
|
<<<<<<< HEAD
|
||||||
static void ic_stop(void) {
|
static void ic_stop(void) {
|
||||||
|
=======
|
||||||
|
static void ic_stop(void) {
|
||||||
|
>>>>>>> 3f862305f83a4a0421b5952d0686bebd9aeee0bc
|
||||||
u32_t base = g_driver.base_addr;
|
u32_t base = g_driver.base_addr;
|
||||||
|
|
||||||
/* Free Rx and Tx buffer*/
|
/* Free Rx and Tx buffer*/
|
||||||
|
|
@ -891,7 +954,11 @@ static void ic_intr(unsigned int mask) {
|
||||||
|
|
||||||
/* Real handler interrupt */
|
/* Real handler interrupt */
|
||||||
static void ic_handler(ic_driver *pdev) {
|
static void ic_handler(ic_driver *pdev) {
|
||||||
|
<<<<<<< HEAD
|
||||||
u32_t base = pdev->base_addr;
|
u32_t base = pdev->base_addr;
|
||||||
|
=======
|
||||||
|
u32_t base = pdev->base_addr;
|
||||||
|
>>>>>>> 3f862305f83a4a0421b5952d0686bebd9aeee0bc
|
||||||
u16_t intr_status;
|
u16_t intr_status;
|
||||||
int flag = 0, tx_head, tx_tail;
|
int flag = 0, tx_head, tx_tail;
|
||||||
ic_desc *desc;
|
ic_desc *desc;
|
||||||
|
|
@ -900,7 +967,11 @@ static void ic_handler(ic_driver *pdev) {
|
||||||
/* ### GET_INTR_STATUS ### */
|
/* ### GET_INTR_STATUS ### */
|
||||||
intr_status = ic_in16(base, REG_ISR);
|
intr_status = ic_in16(base, REG_ISR);
|
||||||
|
|
||||||
|
<<<<<<< HEAD
|
||||||
/* Clear interrupt */
|
/* Clear interrupt */
|
||||||
|
=======
|
||||||
|
/* Clear interrupt */
|
||||||
|
>>>>>>> 3f862305f83a4a0421b5952d0686bebd9aeee0bc
|
||||||
/* ### CLEAR_INTR ### */
|
/* ### CLEAR_INTR ### */
|
||||||
ic_out16(base, REG_ISR, intr_status & INTR_ISR_CLEAR);
|
ic_out16(base, REG_ISR, intr_status & INTR_ISR_CLEAR);
|
||||||
|
|
||||||
|
|
@ -928,7 +999,11 @@ static void ic_handler(ic_driver *pdev) {
|
||||||
/* Check Rx request status */
|
/* Check Rx request status */
|
||||||
/* ### CHECK_RX_INTR ### */
|
/* ### CHECK_RX_INTR ### */
|
||||||
if (intr_status & INTR_ISR_RX_DONE) {
|
if (intr_status & INTR_ISR_RX_DONE) {
|
||||||
|
<<<<<<< HEAD
|
||||||
pdev->recv_flag = TRUE;
|
pdev->recv_flag = TRUE;
|
||||||
|
=======
|
||||||
|
pdev->recv_flag = TRUE;
|
||||||
|
>>>>>>> 3f862305f83a4a0421b5952d0686bebd9aeee0bc
|
||||||
flag++;
|
flag++;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
@ -960,7 +1035,11 @@ static void ic_handler(ic_driver *pdev) {
|
||||||
pdev->stat.ets_packetT++;
|
pdev->stat.ets_packetT++;
|
||||||
pdev->tx[tx_tail].busy = FALSE;
|
pdev->tx[tx_tail].busy = FALSE;
|
||||||
pdev->tx_busy_num--;
|
pdev->tx_busy_num--;
|
||||||
|
<<<<<<< HEAD
|
||||||
|
|
||||||
|
=======
|
||||||
|
|
||||||
|
>>>>>>> 3f862305f83a4a0421b5952d0686bebd9aeee0bc
|
||||||
if (++tx_tail >= TX_DESC_NUM)
|
if (++tx_tail >= TX_DESC_NUM)
|
||||||
tx_tail = 0;
|
tx_tail = 0;
|
||||||
|
|
||||||
|
|
@ -1002,5 +1081,9 @@ static void ic_check_ints(ic_driver *pdev) {
|
||||||
}
|
}
|
||||||
|
|
||||||
static void ic_stat(eth_stat_t *stat) {
|
static void ic_stat(eth_stat_t *stat) {
|
||||||
|
<<<<<<< HEAD
|
||||||
memcpy(stat, &g_driver.stat, sizeof(*stat));
|
memcpy(stat, &g_driver.stat, sizeof(*stat));
|
||||||
|
=======
|
||||||
|
memcpy(stat, &g_driver.stat, sizeof(*stat));
|
||||||
|
>>>>>>> 3f862305f83a4a0421b5952d0686bebd9aeee0bc
|
||||||
}
|
}
|
||||||
|
|
|
||||||
|
|
@ -1,5 +1,6 @@
|
||||||
service ip1000
|
service ip1000
|
||||||
{
|
{
|
||||||
|
<<<<<<< HEAD
|
||||||
type net;
|
type net;
|
||||||
descr "IC Plus 1000A Ethernet Card";
|
descr "IC Plus 1000A Ethernet Card";
|
||||||
system
|
system
|
||||||
|
|
@ -14,3 +15,18 @@ service ip1000
|
||||||
;
|
;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
=======
|
||||||
|
type net;
|
||||||
|
descr "IC Plus 1000A Ethernet Card";
|
||||||
|
system
|
||||||
|
UMAP # 14
|
||||||
|
IRQCTL # 19
|
||||||
|
DEVIO # 21
|
||||||
|
;
|
||||||
|
pci device 13f0:1023;
|
||||||
|
ipc
|
||||||
|
SYSTEM pm rs log tty ds vm
|
||||||
|
pci inet lwip amddev
|
||||||
|
;
|
||||||
|
};
|
||||||
|
>>>>>>> 3f862305f83a4a0421b5952d0686bebd9aeee0bc
|
||||||
|
|
|
||||||
|
|
@ -7,12 +7,15 @@
|
||||||
/* Global configure */
|
/* Global configure */
|
||||||
#define DESC_BASE64
|
#define DESC_BASE64
|
||||||
|
|
||||||
|
<<<<<<< HEAD
|
||||||
/* Rx/Tx buffer parameter */
|
/* Rx/Tx buffer parameter */
|
||||||
#define RX_BUF_SIZE 1536
|
#define RX_BUF_SIZE 1536
|
||||||
#define TX_BUF_SIZE 1536
|
#define TX_BUF_SIZE 1536
|
||||||
#define RX_DESC_NUM 64
|
#define RX_DESC_NUM 64
|
||||||
#define TX_DESC_NUM 64
|
#define TX_DESC_NUM 64
|
||||||
|
|
||||||
|
=======
|
||||||
|
>>>>>>> 3f862305f83a4a0421b5952d0686bebd9aeee0bc
|
||||||
/* Key internal register */
|
/* Key internal register */
|
||||||
#define REG_RCR 0x88
|
#define REG_RCR 0x88
|
||||||
#define REG_ISR 0x5a
|
#define REG_ISR 0x5a
|
||||||
|
|
|
||||||
0
minix/drivers/net/vt6105/Makefile
Executable file → Normal file
0
minix/drivers/net/vt6105/Makefile
Executable file → Normal file
|
|
@ -10,7 +10,11 @@ Revision 1.1 2016/11/12
|
||||||
Modification: Remove and rewrite Linux-derived code
|
Modification: Remove and rewrite Linux-derived code
|
||||||
Authored by Jia-Ju Bai <baijiaju1990@163.com>
|
Authored by Jia-Ju Bai <baijiaju1990@163.com>
|
||||||
|
|
||||||
|
<<<<<<< HEAD
|
||||||
Something can be improved:
|
Something can be improved:
|
||||||
|
=======
|
||||||
|
Something can be improved:
|
||||||
|
>>>>>>> 3f862305f83a4a0421b5952d0686bebd9aeee0bc
|
||||||
1. MII, WOL functions are not adequately defined and used.
|
1. MII, WOL functions are not adequately defined and used.
|
||||||
2. Link status report does not work well.
|
2. Link status report does not work well.
|
||||||
3. Ethernet address can not be modified at present.
|
3. Ethernet address can not be modified at present.
|
||||||
|
|
|
||||||
|
|
@ -54,7 +54,11 @@ static void vt_init_rx_desc(vt_desc *desc, size_t size, phys_bytes dma) {
|
||||||
/* Intialize Tx descriptor (### TX_DESC_INIT ###) */
|
/* Intialize Tx descriptor (### TX_DESC_INIT ###) */
|
||||||
static void vt_init_tx_desc(vt_desc *desc, size_t size, phys_bytes dma) {
|
static void vt_init_tx_desc(vt_desc *desc, size_t size, phys_bytes dma) {
|
||||||
desc->addr = dma;
|
desc->addr = dma;
|
||||||
|
<<<<<<< HEAD
|
||||||
desc->length = size;
|
desc->length = size;
|
||||||
|
=======
|
||||||
|
desc->length = size;
|
||||||
|
>>>>>>> 3f862305f83a4a0421b5952d0686bebd9aeee0bc
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Real hardware reset (### RESET_HARDWARE_CAN_FAIL ###)
|
/* Real hardware reset (### RESET_HARDWARE_CAN_FAIL ###)
|
||||||
|
|
@ -68,7 +72,11 @@ static int vt_real_reset(u32_t base) {
|
||||||
if (vt_in16(base, REG_CR) & CMD_RESET)
|
if (vt_in16(base, REG_CR) & CMD_RESET)
|
||||||
return -EIO;
|
return -EIO;
|
||||||
}
|
}
|
||||||
|
<<<<<<< HEAD
|
||||||
return OK;
|
return OK;
|
||||||
|
=======
|
||||||
|
return OK;
|
||||||
|
>>>>>>> 3f862305f83a4a0421b5952d0686bebd9aeee0bc
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Intialize power (### POWER_INIT_CAN_FAIL ###)
|
/* Intialize power (### POWER_INIT_CAN_FAIL ###)
|
||||||
|
|
@ -109,7 +117,11 @@ static void vt_get_addr(u32_t base, u8_t *pa) {
|
||||||
pa[i] = vt_in8(base, REG_ADDR + i);
|
pa[i] = vt_in8(base, REG_ADDR + i);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
<<<<<<< HEAD
|
||||||
/* Check link status (### CHECK_LINK ###)
|
/* Check link status (### CHECK_LINK ###)
|
||||||
|
=======
|
||||||
|
/* Check link status (### CHECK_LINK ###)
|
||||||
|
>>>>>>> 3f862305f83a4a0421b5952d0686bebd9aeee0bc
|
||||||
* -- Return LINK_UP or LINK_DOWN */
|
* -- Return LINK_UP or LINK_DOWN */
|
||||||
static int vt_check_link(u32_t base) {
|
static int vt_check_link(u32_t base) {
|
||||||
u32_t r;
|
u32_t r;
|
||||||
|
|
@ -128,17 +140,29 @@ static void vt_stop_rx_tx(u32_t base) {
|
||||||
vt_out16(base, REG_CR, CMD_STOP);
|
vt_out16(base, REG_CR, CMD_STOP);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
<<<<<<< HEAD
|
||||||
/* Check whether Rx status OK (### CHECK_RX_STATUS_OK ###)
|
/* Check whether Rx status OK (### CHECK_RX_STATUS_OK ###)
|
||||||
|
=======
|
||||||
|
/* Check whether Rx status OK (### CHECK_RX_STATUS_OK ###)
|
||||||
|
>>>>>>> 3f862305f83a4a0421b5952d0686bebd9aeee0bc
|
||||||
* -- Return TRUE or FALSE */
|
* -- Return TRUE or FALSE */
|
||||||
static int vt_rx_status_ok(vt_desc *desc) {
|
static int vt_rx_status_ok(vt_desc *desc) {
|
||||||
if (!(desc->status & DESC_OWN)) {
|
if (!(desc->status & DESC_OWN)) {
|
||||||
if ((desc->status & DESC_RX_NORMAL) == DESC_RX_NORMAL)
|
if ((desc->status & DESC_RX_NORMAL) == DESC_RX_NORMAL)
|
||||||
return TRUE;
|
return TRUE;
|
||||||
|
<<<<<<< HEAD
|
||||||
}
|
}
|
||||||
return FALSE;
|
return FALSE;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Get Rx data length from descriptor (### GET_RX_LEN ###)
|
/* Get Rx data length from descriptor (### GET_RX_LEN ###)
|
||||||
|
=======
|
||||||
|
}
|
||||||
|
return FALSE;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Get Rx data length from descriptor (### GET_RX_LEN ###)
|
||||||
|
>>>>>>> 3f862305f83a4a0421b5952d0686bebd9aeee0bc
|
||||||
* --- Return the length */
|
* --- Return the length */
|
||||||
static int vt_get_rx_len(vt_desc *desc) {
|
static int vt_get_rx_len(vt_desc *desc) {
|
||||||
int len;
|
int len;
|
||||||
|
|
@ -160,7 +184,11 @@ static void vt_wakeup_tx(u32_t base) {
|
||||||
vt_out8(base, REG_CR, cmd);
|
vt_out8(base, REG_CR, cmd);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
<<<<<<< HEAD
|
||||||
/* Check whether Tx status OK (### CHECK_TX_STATUS_OK ###)
|
/* Check whether Tx status OK (### CHECK_TX_STATUS_OK ###)
|
||||||
|
=======
|
||||||
|
/* Check whether Tx status OK (### CHECK_TX_STATUS_OK ###)
|
||||||
|
>>>>>>> 3f862305f83a4a0421b5952d0686bebd9aeee0bc
|
||||||
* -- Return TRUE or FALSE */
|
* -- Return TRUE or FALSE */
|
||||||
static int vt_tx_status_ok(vt_desc *desc) {
|
static int vt_tx_status_ok(vt_desc *desc) {
|
||||||
if (!(desc->status & DESC_OWN))
|
if (!(desc->status & DESC_OWN))
|
||||||
|
|
@ -278,7 +306,11 @@ static int vt_probe(vt_driver *pdev, int instance) {
|
||||||
}
|
}
|
||||||
pdev->base_addr = bar;
|
pdev->base_addr = bar;
|
||||||
#endif
|
#endif
|
||||||
|
<<<<<<< HEAD
|
||||||
|
|
||||||
|
=======
|
||||||
|
|
||||||
|
>>>>>>> 3f862305f83a4a0421b5952d0686bebd9aeee0bc
|
||||||
/* Get irq number */
|
/* Get irq number */
|
||||||
irq = pci_attr_r8(devind, PCI_ILR);
|
irq = pci_attr_r8(devind, PCI_ILR);
|
||||||
pdev->irq = irq;
|
pdev->irq = irq;
|
||||||
|
|
@ -525,16 +557,28 @@ static void vt_conf_addr(vt_driver *pdev, ether_addr_t *addr) {
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Stop the driver */
|
/* Stop the driver */
|
||||||
|
<<<<<<< HEAD
|
||||||
static void vt_stop(void) {
|
static void vt_stop(void) {
|
||||||
|
=======
|
||||||
|
static void vt_stop(void) {
|
||||||
|
>>>>>>> 3f862305f83a4a0421b5952d0686bebd9aeee0bc
|
||||||
u32_t base = g_driver.base_addr;
|
u32_t base = g_driver.base_addr;
|
||||||
|
|
||||||
/* Free Rx and Tx buffer*/
|
/* Free Rx and Tx buffer*/
|
||||||
free_contig(g_driver.buf, g_driver.buf_size);
|
free_contig(g_driver.buf, g_driver.buf_size);
|
||||||
|
<<<<<<< HEAD
|
||||||
|
|
||||||
/* Stop interrupt */
|
/* Stop interrupt */
|
||||||
/* ### DISABLE_INTR ### */
|
/* ### DISABLE_INTR ### */
|
||||||
vt_out16(base, REG_IMR, INTR_IMR_DISABLE);
|
vt_out16(base, REG_IMR, INTR_IMR_DISABLE);
|
||||||
|
|
||||||
|
=======
|
||||||
|
|
||||||
|
/* Stop interrupt */
|
||||||
|
/* ### DISABLE_INTR ### */
|
||||||
|
vt_out16(base, REG_IMR, INTR_IMR_DISABLE);
|
||||||
|
|
||||||
|
>>>>>>> 3f862305f83a4a0421b5952d0686bebd9aeee0bc
|
||||||
/* Stop Rx/Tx */
|
/* Stop Rx/Tx */
|
||||||
/* ### STOP_RX_TX ### */
|
/* ### STOP_RX_TX ### */
|
||||||
vt_stop_rx_tx(base);
|
vt_stop_rx_tx(base);
|
||||||
|
|
@ -669,7 +713,11 @@ static void vt_intr(unsigned int mask) {
|
||||||
|
|
||||||
/* Real handler interrupt */
|
/* Real handler interrupt */
|
||||||
static void vt_handler(vt_driver *pdev) {
|
static void vt_handler(vt_driver *pdev) {
|
||||||
|
<<<<<<< HEAD
|
||||||
u32_t base = pdev->base_addr;
|
u32_t base = pdev->base_addr;
|
||||||
|
=======
|
||||||
|
u32_t base = pdev->base_addr;
|
||||||
|
>>>>>>> 3f862305f83a4a0421b5952d0686bebd9aeee0bc
|
||||||
u16_t intr_status;
|
u16_t intr_status;
|
||||||
int flag = 0, tx_head, tx_tail;
|
int flag = 0, tx_head, tx_tail;
|
||||||
vt_desc *desc;
|
vt_desc *desc;
|
||||||
|
|
@ -678,7 +726,11 @@ static void vt_handler(vt_driver *pdev) {
|
||||||
/* ### GET_INTR_STATUS ### */
|
/* ### GET_INTR_STATUS ### */
|
||||||
intr_status = vt_in16(base, REG_ISR);
|
intr_status = vt_in16(base, REG_ISR);
|
||||||
|
|
||||||
|
<<<<<<< HEAD
|
||||||
/* Clear interrupt */
|
/* Clear interrupt */
|
||||||
|
=======
|
||||||
|
/* Clear interrupt */
|
||||||
|
>>>>>>> 3f862305f83a4a0421b5952d0686bebd9aeee0bc
|
||||||
/* ### CLEAR_INTR ### */
|
/* ### CLEAR_INTR ### */
|
||||||
vt_out16(base, REG_ISR, intr_status & INTR_ISR_CLEAR);
|
vt_out16(base, REG_ISR, intr_status & INTR_ISR_CLEAR);
|
||||||
|
|
||||||
|
|
@ -706,7 +758,11 @@ static void vt_handler(vt_driver *pdev) {
|
||||||
/* Check Rx request status */
|
/* Check Rx request status */
|
||||||
/* ### CHECK_RX_INTR ### */
|
/* ### CHECK_RX_INTR ### */
|
||||||
if (intr_status & INTR_ISR_RX_DONE) {
|
if (intr_status & INTR_ISR_RX_DONE) {
|
||||||
|
<<<<<<< HEAD
|
||||||
pdev->recv_flag = TRUE;
|
pdev->recv_flag = TRUE;
|
||||||
|
=======
|
||||||
|
pdev->recv_flag = TRUE;
|
||||||
|
>>>>>>> 3f862305f83a4a0421b5952d0686bebd9aeee0bc
|
||||||
flag++;
|
flag++;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
@ -738,7 +794,11 @@ static void vt_handler(vt_driver *pdev) {
|
||||||
pdev->stat.ets_packetT++;
|
pdev->stat.ets_packetT++;
|
||||||
pdev->tx[tx_tail].busy = FALSE;
|
pdev->tx[tx_tail].busy = FALSE;
|
||||||
pdev->tx_busy_num--;
|
pdev->tx_busy_num--;
|
||||||
|
<<<<<<< HEAD
|
||||||
|
|
||||||
|
=======
|
||||||
|
|
||||||
|
>>>>>>> 3f862305f83a4a0421b5952d0686bebd9aeee0bc
|
||||||
if (++tx_tail >= TX_DESC_NUM)
|
if (++tx_tail >= TX_DESC_NUM)
|
||||||
tx_tail = 0;
|
tx_tail = 0;
|
||||||
|
|
||||||
|
|
@ -780,5 +840,9 @@ static void vt_check_ints(vt_driver *pdev) {
|
||||||
}
|
}
|
||||||
|
|
||||||
static void vt_stat(eth_stat_t *stat) {
|
static void vt_stat(eth_stat_t *stat) {
|
||||||
|
<<<<<<< HEAD
|
||||||
memcpy(stat, &g_driver.stat, sizeof(*stat));
|
memcpy(stat, &g_driver.stat, sizeof(*stat));
|
||||||
|
=======
|
||||||
|
memcpy(stat, &g_driver.stat, sizeof(*stat));
|
||||||
|
>>>>>>> 3f862305f83a4a0421b5952d0686bebd9aeee0bc
|
||||||
}
|
}
|
||||||
|
|
|
||||||
0
minix/drivers/net/vt6105/vt6105.conf
Executable file → Normal file
0
minix/drivers/net/vt6105/vt6105.conf
Executable file → Normal file
|
|
@ -7,12 +7,15 @@
|
||||||
/* Global configure */
|
/* Global configure */
|
||||||
#define DESC_BASE64
|
#define DESC_BASE64
|
||||||
|
|
||||||
|
<<<<<<< HEAD
|
||||||
/* Rx/Tx buffer parameter */
|
/* Rx/Tx buffer parameter */
|
||||||
#define RX_BUF_SIZE 1536
|
#define RX_BUF_SIZE 1536
|
||||||
#define TX_BUF_SIZE 1536
|
#define TX_BUF_SIZE 1536
|
||||||
#define RX_DESC_NUM 64
|
#define RX_DESC_NUM 64
|
||||||
#define TX_DESC_NUM 64
|
#define TX_DESC_NUM 64
|
||||||
|
|
||||||
|
=======
|
||||||
|
>>>>>>> 3f862305f83a4a0421b5952d0686bebd9aeee0bc
|
||||||
/* Key internal register */
|
/* Key internal register */
|
||||||
#define REG_RCR 0x06
|
#define REG_RCR 0x06
|
||||||
#define REG_ISR 0x0c
|
#define REG_ISR 0x0c
|
||||||
|
|
|
||||||
|
|
@ -66,6 +66,7 @@ service_get_policies(struct policies * pol, index_t slot)
|
||||||
{ .label = "dpeth", .policy_str = "reset" },
|
{ .label = "dpeth", .policy_str = "reset" },
|
||||||
{ .label = "e1000", .policy_str = "reset" },
|
{ .label = "e1000", .policy_str = "reset" },
|
||||||
{ .label = "fxp", .policy_str = "reset" },
|
{ .label = "fxp", .policy_str = "reset" },
|
||||||
|
{ .label = "ip1000", .policy_str = "reset" },
|
||||||
{ .label = "lance", .policy_str = "reset" },
|
{ .label = "lance", .policy_str = "reset" },
|
||||||
{ .label = "lan8710a", .policy_str = "reset" },
|
{ .label = "lan8710a", .policy_str = "reset" },
|
||||||
{ .label = "orinoco", .policy_str = "reset" },
|
{ .label = "orinoco", .policy_str = "reset" },
|
||||||
|
|
|
||||||
Loading…
Reference in New Issue
Block a user