kernel:pending changes dynamic configuration.

Change-Id: I0f0ef014e5f341ad5df8c048863c8e5032b80950
2013-11-29 14:38:49 +01:00 · 2013-11-29 14:38:49 +01:00 · 2cf4d5d0de
commit 2cf4d5d0de
parent dfbe27efa5
7 changed files with 86 additions and 49 deletions
--- a/kernel/arch/earm/arch_clock.c
+++ b/kernel/arch/earm/arch_clock.c
@ -7,6 +7,7 @@
 #include "kernel/proc.h"
 #include "kernel/interrupt.h"
 #include <minix/u64.h>
+#include <minix/board.h>
 #include "kernel/glo.h"
 #include "kernel/profile.h"

@ -28,12 +29,14 @@ int init_local_timer(unsigned freq)
 {
 	omap3_timer_init(freq);
 	omap3_frclock_init();
-#ifdef DM37XX
-	tsc_per_ms[0] = 16250;
-#endif
-#ifdef AM335X
-	tsc_per_ms[0] = 15000;
-#endif
+
+	if (BOARD_IS_BBXM(machine.board_id)){
+		tsc_per_ms[0] = 16250;
+	} else if (BOARD_IS_BB(machine.board_id)){
+		tsc_per_ms[0] = 15000;
+	} else {
+		panic("Can not do the clock setup. machine (0x%08x) is unknown\n",machine.board_id);
+	};

 	return 0;
 }
--- a/kernel/arch/earm/do_padconf.c
+++ b/kernel/arch/earm/do_padconf.c
@ -4,9 +4,9 @@
 #if USE_PADCONF

 /* get arch specific arch_padconf_set() */
-#if defined(AM335X) || defined(DM37XX)
+//#if defined(AM335X) || defined(DM37XX)
 #include "omap_padconf.h"
-#endif
+//#endif

 /*===========================================================================*
 *                                do_padconf                                 *
--- a/kernel/arch/earm/memory.c
+++ b/kernel/arch/earm/memory.c
@ -6,6 +6,7 @@
 #include <machine/vm.h>

 #include <minix/type.h>
+#include <minix/board.h>
 #include <minix/syslib.h>
 #include <minix/cpufeature.h>
 #include <string.h>
@ -737,12 +738,13 @@ int arch_phys_map(const int index,
 	}
 	else if (index == frclock_index) {

-#ifdef DM37XX
-		*addr = OMAP3_GPTIMER10_BASE;
-#endif
-#ifdef AM335X
-		*addr = AM335X_DMTIMER7_BASE;
-#endif
+		if (BOARD_IS_BBXM(machine.board_id)){
+			*addr = OMAP3_GPTIMER10_BASE;
+		} else if (BOARD_IS_BB(machine.board_id)){
+			*addr = AM335X_DMTIMER7_BASE;
+		} else {
+			panic("Can not do the clock setup. machine (0x%08x) is unknown\n",machine.board_id);
+		};
 		*len = ARM_PAGE_SIZE;
 		*flags = VMMF_UNCACHED | VMMF_USER;
 		return OK;
@ -792,15 +794,15 @@ int arch_phys_map_reply(const int index, const vir_bytes addr)
 		return OK;
 	}
 	else if (index == frclock_index) {
-#if defined(DM37XX)
-		minix_kerninfo.minix_frclock_tcrr = addr + OMAP3_TIMER_TCRR;
-		minix_kerninfo.minix_arm_frclock_hz = 1625000;
-#elif defined(AM335X) 
-		minix_kerninfo.minix_frclock_tcrr = addr + AM335X_TIMER_TCRR;
-		minix_kerninfo.minix_arm_frclock_hz = 1500000;
-#else
-#error ARM: plese define either AM335X or DM37XX.
-#endif
+		if (BOARD_IS_BBXM(machine.board_id)){
+			minix_kerninfo.minix_frclock_tcrr = addr + OMAP3_TIMER_TCRR;
+			minix_kerninfo.minix_arm_frclock_hz = 1625000;
+		} else if (BOARD_IS_BB(machine.board_id)){
+			minix_kerninfo.minix_frclock_tcrr = addr + AM335X_TIMER_TCRR;
+			minix_kerninfo.minix_arm_frclock_hz = 1500000;
+		} else {
+			panic("memory setup errot machine (0x%08x) is unhandled\n",machine.board_id);
+		};

 		return OK;
 	}
--- a/kernel/arch/earm/omap_intr.c
+++ b/kernel/arch/earm/omap_intr.c
@ -1,6 +1,7 @@
 #include <sys/types.h>
 #include <machine/cpu.h>
 #include <minix/type.h>
+#include <minix/board.h>
 #include <io.h>

 #include "kernel/kernel.h"
@ -21,12 +22,13 @@ static kern_phys_map intr_phys_map;

 int intr_init(const int auto_eoi)
 {
-#ifdef DM37XX
-    omap_intr.base = OMAP3_DM37XX_INTR_BASE;
-#endif
-#ifdef AM335X
-    omap_intr.base = OMAP3_AM335X_INTR_BASE;
-#endif
+    if (BOARD_IS_BBXM(machine.board_id)){
+	omap_intr.base = OMAP3_DM37XX_INTR_BASE;
+    } else if (BOARD_IS_BB(machine.board_id)){
+	omap_intr.base = OMAP3_AM335X_INTR_BASE;
+    } else {
+	panic("Can not do the interrupt setup. machine (0x%08x) is unknown\n",machine.board_id);
+    };
    omap_intr.size = 0x1000 ; /* 4K */

    kern_phys_map_ptr(omap_intr.base,omap_intr.size,
--- a/kernel/arch/earm/omap_intr.h
+++ b/kernel/arch/earm/omap_intr.h
@ -1,16 +1,16 @@
 #ifndef _OMAP_INTR_H
 #define _OMAP_INTR_H

-#ifdef DM37XX
+//#ifdef DM37XX
 /* Interrupt controller memory map */
 #define OMAP3_DM37XX_INTR_BASE 0x48200000 /* INTCPS physical address */

-#endif /* DM37XX */
+//#endif /* DM37XX */

-#ifdef AM335X
+//#ifdef AM335X
 /* Interrupt controller memory map */
 #define OMAP3_AM335X_INTR_BASE 0x48200000 /* INTCPS physical address */
-#endif /* AM335X */
+//#endif /* AM335X */

 /* Interrupt controller registers */
 #define OMAP3_INTCPS_REVISION     0x000 /* IP revision code */
@ -59,7 +59,7 @@



-#ifdef DM37XX
+//#ifdef DM37XX

 #define OMAP3_DM337X_NR_IRQ_VECTORS    96

@ -135,9 +135,9 @@
 #define OMAP3_HSUSB_DMA_IRQ 93  /* High-speed USB OTG DMA */
 #define OMAP3_MMC3_IRQ      94  /* MMC/SD module 3 */

-#endif
+//#endif

-#ifdef AM335X
+//#ifdef AM335X
 #define AM335X_INT_EMUINT                         0	/* Emulation interrupt (EMUICINTR) */
 #define AM335X_INT_COMMTX                         1	/* CortexA8 COMMTX */
 #define AM335X_INT_COMMRX                         2	/* CortexA8 COMMRX */
@ -239,7 +239,7 @@
 #define AM335X_INT_SPI1INT                        125	/* McSPI1  SINTERRUPTN */

 #define OMAP3_AM335X_NR_IRQ_VECTORS    125 
-#endif
+//#endif

 #ifndef __ASSEMBLY__

--- a/kernel/arch/earm/omap_padconf.c
+++ b/kernel/arch/earm/omap_padconf.c
@ -6,6 +6,7 @@
 #include <machine/cpu.h>
 #include <minix/mmio.h>
 #include <minix/padconf.h>
+#include <minix/board.h>
 #include <assert.h>
 #include <io.h>
 #include <stdlib.h>
@ -18,25 +19,43 @@ struct omap_padconf
 	vir_bytes base;
 	vir_bytes offset;
 	vir_bytes size;
+	unsigned int board_filter_value;
+	unsigned int board_filter_mask;
 };

-static struct omap_padconf omap_padconf = {
-	.base = PADCONF_REGISTERS_BASE,
-	.offset = PADCONF_REGISTERS_OFFSET,
-	.size = PADCONF_REGISTERS_SIZE
+
+struct omap_padconf omap_padconfs[] = {
+  {
+	.base = PADCONF_DM37XX_REGISTERS_BASE,
+	.offset = PADCONF_DM37XX_REGISTERS_OFFSET,
+	.size = PADCONF_DM37XX_REGISTERS_SIZE,
+	.board_filter_value = BOARD_FILTER_BBXM_VALUE,
+	.board_filter_mask = BOARD_FILTER_BBXM_MASK,
+  },
+  {
+	.base = PADCONF_AM335X_REGISTERS_BASE,
+	.offset = PADCONF_AM335X_REGISTERS_OFFSET,
+	.size = PADCONF_AM335X_REGISTERS_SIZE,
+	.board_filter_value = BOARD_FILTER_BB_VALUE,
+	.board_filter_mask = BOARD_FILTER_BB_MASK,
+  },
 };

+/* initialized in init */
+static struct omap_padconf *omap_padconf;
+
+
 static kern_phys_map padconf_phys_map;

 int
 arch_padconf_set(u32_t padconf, u32_t mask, u32_t value)
 {
 	/* check that the value will be inside the padconf memory range */
-	if (padconf >= (PADCONF_REGISTERS_SIZE - PADCONF_REGISTERS_OFFSET)) {
+	if (padconf >= (omap_padconf->size - omap_padconf->offset)) {
 		return EINVAL;	/* outside of valid range */
 	}

-	set32(padconf + omap_padconf.base + omap_padconf.offset, mask, value);
+	set32(padconf + omap_padconf->base + omap_padconf->offset, mask, value);

 	return OK;
 }
@ -44,8 +63,19 @@ arch_padconf_set(u32_t padconf, u32_t mask, u32_t value)
 void
 arch_padconf_init(void)
 {
-	kern_phys_map_ptr(omap_padconf.base, omap_padconf.size,
-	     &padconf_phys_map, (vir_bytes) &omap_padconf.base);
+	int x;
+	omap_padconf = NULL;
+	/* find the correct padconf */
+	for (x =0 ; x < sizeof(omap_padconfs)/sizeof(omap_padconfs[0]) ; x++){
+		if ( (omap_padconfs[x].board_filter_mask & machine.board_id) == omap_padconfs[x].board_filter_value){
+			omap_padconf = &omap_padconfs[x];
+			break;
+		}
+	}
+	assert(omap_padconf);
+		
+	kern_phys_map_ptr(omap_padconf->base, omap_padconf->size,
+	     &padconf_phys_map, (vir_bytes) &omap_padconf->base);

 	return;
 }
--- a/kernel/arch/earm/omap_timer_registers.h
+++ b/kernel/arch/earm/omap_timer_registers.h
@ -1,7 +1,7 @@
 #ifndef _OMAP_TIMER_REGISTERS_H
 #define _OMAP_TIMER_REGISTERS_H

-#ifdef DM37XX
+//#ifdef DM37XX

 /* General-purpose timer register map */
 #define OMAP3_GPTIMER1_BASE  0x48318000 /* GPTIMER1 physical address */
@ -16,7 +16,7 @@
 #define OMAP3_GPTIMER10_BASE 0x48086000 /* GPTIMER10 physical address */
 #define OMAP3_GPTIMER11_BASE 0x48088000 /* GPTIMER11 physical address */

-#endif /* DM37XX */
+//#endif /* DM37XX */

 /* General-purpose timer registers */
 #define OMAP3_TIMER_TIDR      0x000 /* IP revision code */
@ -40,7 +40,7 @@
 #define OMAP3_TIMER_TOCR      0x054 /* Masks tick interrupt */
 #define OMAP3_TIMER_TOWR      0x058 /* Number of masked overflow interrupts */

-#ifdef AM335X
+//#ifdef AM335X
 #define AM335X_DMTIMER0_BASE      0x44E05000  /* DMTimer0 Registers */
 #define AM335X_DMTIMER1_1MS_BASE  0x44E31000 /* DMTimer1 1ms Registers (Accurate 1ms timer) */
 #define AM335X_DMTIMER2_BASE      0x48040000 /*  DMTimer2 Registers */
@ -68,7 +68,7 @@
 #define AM335X_TIMER_TSICR     0x054 /* Control posted mode and functional SW reset */
 #define AM335X_TIMER_TCAR2     0x058 /* Second captured value of counter register */

-#endif
+//#endif


 /* Interrupt status register fields */